Device for the processing of digital symbol data for the purpose of displaying text on a television monitor

ABSTRACT

A computer terminal for the processing of supplied symbol data for the purpose of displaying lines of text on a television monitor. The buffer memory of the computer terminal comprises an input circuit and a plurality of cyclic submemories, where the input circuit provides for the storage of the data required for displaying one line of text in the respective submemory. The number of times this data is fed from the respective submemory to a symbol generator connected to the buffer memory, corresponds to the number of scan lines required for displaying one line of text, the symbol generator feeding the data of a desired scan line each time to said monitor.

United States Patent 91 Busink [75] Inventor: Hendrik Busink, Eibergen,

Netherlands [73] Assignee: N.V. Hollandse Signaaiapparaten,

Hengelo, Netherlands [22] Filed: July 19, 1972 [21] Appl. No.: 273,347

[30] Foreign Application Priority Date July 23. 197i Netherlands 7ll0l58[52] US. Cl. 340/1725, 340/324 AD [51 Int. Cl G06! 3/14, G08b 23/00 [58]Field of Search..... 340/l72.5, 324 AD; 178/15, 178/30 [56] ReferencesCited UNITED STATES PATENTS 3,70l,988 l0/l972 Allaart 340/324 A [451Jan. 22, 1974 Primary Examiner-Raulfe B. Zache Attorney, Agent, orFirm-Frank R. Trifari [57] ABSTRACT A computer terminal for theprocessing of supplied symbol data for the purpose of displaying linesof text on a television monitor. The buffer memory of the computerterminal comprises an input circuit and a plurality of cyclicsubmemories, where the input circuit provides for the storage of thedata required for displaying one line of text in the respectivesubmemory. The number of times this data is fed from the respectivesubmemory to a symbol generator connected to the buffer memory,corresponds to the number of scan lines required for displaying one lineof text, the symbol generator feeding the data of a desired scan lineeach time to said monitor.

9 Claim, 6 Drawing Figures GIGU SISIIEWIIESZ t a s vc "IEO IAIIII IEIMYSYIIUL PATENTED JAN 2 2 I974 SHEET 1 BF 5 E2228 dji #Eww PATEHIEB JAN 22 IBM SHEEI 5 BF 5 DEVICE FOR THE PROCESSING OF DIGITAL SYMBOL DATA FORTHE PURPOSE OF DISPLAYING TEXT ON A TELEVISION MONITOR The inventionrelates to a device for the processing of symbol data presented indigital form for the purpose of displaying text on a television monitor.The device consists of a buffer memory, a symbol generator and a timingunit. The device can, on the one hand, present successive lines of textin the read direction to the television screen, and, on the other hand,replace symbols randomly allocated and already displayed by othersymbols. A buffer memory is capable of storing the maximum number ofsymbols to be displayed on the screen, and there is provided at leastone recirculating memory in which the data required for display, andreferring to one line of text, can be stored in parallel form, while thenumber of times at which said data is fed to the symbol generatorcorresponds to the number of scan lines required for the display of oneline of text. Each time the data required for display, and pertaining toa desired scan line, is fed to said monitor by the symbol generator.

The lines of text are made visible on the screen of the above-mentionedtelevision monitor by means of horizontal line scanning. Each line oftext is formed by a fixed number of scan lines. To obtain these scanlines, the electron beam in the picture tube is deflected each time inthe horizontal direction. With this deflection, the electron beamstrikes the screen at the positions where the parts of the desiredsymbols pertaining to the respective scan line must be displayed. Such apart of a line of text, to be displayed in the horizontal direction is,owing to the rapidly fluctuating grid voltage in the picture tube, builtup of a series of luminous points or luminous dashes, depending on theapplied fluctuating grid voltage. When the electron beam has completed ahorizontal scan, the beam performs a horizontal retrace on the presenceof a line synchronization signal required for this purpose. The electronbeam then starts a new horizontal scan, which is somewhat lower than theprevious one, because the beam is deflected downward to some extentduring each horizontal line scan. If the beam has arrived at the bottomside of the screen, the beam performs a vertical retrace on the presenceof a conventional frame synchronization signal, whereupon the beam canstart anew with horizontal line scanning. During such a retrace, ablanking signal ensures that the electron beam is suppressed, preventingthe scanning of the picture screen. The above synchronization signalsand the blanking signals can be supplied, for example, by the timingunit.

A symbol may already be recognized on the screen if it is displayed, forexample, on scan lines, using only a part of each scan line. The lengthof each of these parts of the scan lines is such that, for example,seven luminous and equidistant dots or dashes can be placed on eachpart. Hence, in this example, the projection area of one single symbolwill consist of a matrix of ten by seven dots or dashes.

In addition to a space between two successive symbols pertaining to oneline of text, the length of this space being such that, for example,four luminous dots or dashes can be placed on it, also a line space isrequired between the lines of text. The latter space may be obtained,for example, by leaving blank three scan lines preceding, and five scanlines following a line of text. Thus the picture screen field may bedivided into matrices of eighteen by eleven dots, each of which allowsthe placing of one symbol only. In this way, when using a televisionmonitor suitable for a C.C.l.R. 625- line standard signal, 32 lines oftext can be displayed on the screen and 49 scan lines will still be leftover. These scan lines are not used, however, because the time neededfor making use of this is required to perform two vertical retraces,provided the generally applied principle of interlaced scanning is used;first the odd numbered scan lines are traced sequentially and then,after a vertical retrace, the even numbered scan lines. Theconsecutively projected frames" thus obtained, together form the desireddisplay. For the sake of clarity of the description, the principle ofinterlaced scanning on the monitor will be deviated from, if necessary.

A device, as described in the opening paragraph is shown in the DutchPatent application No. 6817586. In the device of this patent applicationthe buffer memory comprises a closed magnetostrictive delay line, ashift register and a recirculating memory. The information relative tothe total text to be displayed on the television screen and derived, forexample, from a computer, is inserted serially into the above-mentioneddelay line, and then cyclically shifted in this delay line. The part ofthis information which is required for displaying one single line oftext, is presented each time to the shift register. This information isthen read out per symbol in parallel form from the above shift register,and fed tothe recirculating memory.

If at a certain moment, a symbol already displayed is to be replaced byanother symbol, the corresponding symbol information in the buffermemory must be replaced by new information to this effect; this can bedone only at the fixed write-in location of this buffer memory. Sincethe symbol information to be changed may be found at a random locationin the buffer memory at the given moment, such information cannot bereplaced directly. If a delay line, as described in the above-mentionedDutch Patent Application, is employed, a relatively long waiting timemust usually be taken into account before the symbol information can bechanged at the fixed write-in location. This is because the symbolinformation must usually pass through half of the number of theavailable memory locations, before the write-in location has beenreached. Since the time required by the symbol information to be shiftedcyclically once in the delay line must be equal to the frame time, i.e.the time required to form an interlaced frame on the screen, the meanwaiting time will be equal to half of the frame time. With theconventional frame frequency of 50 Hz, this mean waiting time is IDmsec, which implies that the communication line between computer andbuffer memory is occupied a relatively long period.

In order to process in the buffer memory the presented symbol data in asimple and relatively rapid way, it is desirable to shorten the meanwaiting time before symbol data can be stored.

Hence, the object of the invention is to provide a device, of the kindset forth in the opening paragraph, that fully meets this desire. Inaccordance with the invention, the buffer memory used in said device isprovided with an input circuit and a plurality of cyclic submemories.The information required for displaying one specific line of text iswritten into the respective sub- 7 memory with the aid of the inputcircuit.

If it is desired to replace symbol infonnation in the buffer memory byother information. a waiting time is to be observed during which thisinformation is shifted cyclically to the write-in location of therespective submemory; this usually takes a time that corresponds to theperiod during which the symbol information passes through half of thenumber of the available memory locations of the respective submemory.

In a first version of the device in accordance with the invention, oneof the cyclic submemories is fonned by said recirculating memory, whilethe remaining submemories are identical to this. The time, during whichthe information is shifted cyclically once in the recirculating memory,is equal to the time during which one scan line can be generated (scanline time). Consequently, the mean waiting time preceding the moment ofstoring new symbol information is equal to half of the scan line time.Taking into account the interlaced display, at which only half of thenumber of scan lines is displayed during the frame time, the scan linetime will be l/SO 2/625 sec 64 psec with the use of 625 scan lines fordisplaying text on a television screen, and therefore the mean waitingtime for storing new symbol information will take 32 psec.

In a second version of the device in accordance with the invention, thesymbol information of each line of text is written serially into therespective cyclic submemory. With the use of a specific shift register,this stored symbol information is extracted from the respectivesubmemory per line of text, and presented in parallel form to therecirculating memory. The symbol information stored in the submemorymust have been shifted cyclically once in the same time during which aline of text is being displayed on the screen. If such a line of textincluding line space is realized by making use of 2n scan lines, themean waiting time will be equal to half of the time in which n" scanlines will have been generated; this waiting time is "n" times as largeas that in the first-mentioned version, and thus is n" 32 psec, whichstill is a reasonable reduction of the waiting time compared with themean waiting time in the cited Dutch Patent Application.

The invention will further be explained with reference to the figures,of which:

FIG. 1 illustrates a block diagram of a first version of the device inaccordance with the invention;

FIG. 2 illustrates a more detailed block diagram of the buffer memoryincorporated in said device;

FIG. 3 illustrates a more detailed block diagram ofa recirculatingmemory;

FIG. 4 illustrates a block diagram of a second version of the device inaccordance with the invention;

FIG. 5A illustrates an example of a symbol to be displayed, while FIG.58 illustrates the accompanying diagram of video signals.

In these figures like parts are designated by like reference numerals.

FIG. 1 relates to a device for the processing of symbol data representedin digital form for displaying text on a television monitor, whichdevice consists of a buffer memory 1, a symbol generator 2 and a timingunit 3.

The text to be displayed on the monitor may be composed of various kindsof symbols; usually this is limited, however, to alphanumeric symbols,viz, letters and numerals. In spite of this, other symbols may appear ina text, such as mathematical designations, reference marks, etc.

It is customary that the computer provides the symbol data; the data isthen presented in the form of code words. These code words either referto the type of symbol to be displayed, or to the location on the monitorwhere a symbol should be displayed. The length of the code words, in sofar as they refer to the type of symbol to be displayed, depends on themaximum number of symbols to be used; if for the display a choice ismade from 33 to 64 various symbols, a code word should then comprise sixbinary digits. For obtaining symbol data use may also be made of akeyboard, which is then provided with an encoder. The code words, in sofar as these refer to the location where the symbols should be displayedon the monitor, will either contain information of the line of text, orinformation of the location on this line.

With the display of symbols on the screen in accordance with thehorizontal scanning described hereinbefore, it is important that theinformation of the symbols to be displayed is available per scan line.Depending on the scan line to be generated, and on the symbol datapresented, this information per scan line is supplied by the symbolgenerator 2. To this effect, the number of successive times at which theinformation referring to a line of text is presented to the symbolgenerator 2, must be equal to the number of scan lines used fordisplaying one single line of text including line space. The signals(video signals) thus supplied serially by the symbol generator 2 are fedto a combination circuit, which is not indicated, and are henceconverted, together with the above-mentioned synchronisation andblanking signals, into a form suitable for presentation to thetelevision monitor in the conventional manner. The latter signalsprovide the information of the grid-cathode voltage to be formed. Withthe aid of this voltage the luminous dots or dashes, comprising a partof the line of text to be displayed in a horizontal direction, areobtained on the screen.

In order to avoid continuous use of the computer for obtaining thesymbol data required for display, the device is provided with a buffermemory 1 which precedes the symbol generator 2. The symbol datapresented by the computer is stored in this buffer memory; the computermust be engaged only when the symbols displayed on the television screenare changed, so that in the buffer memory I, the informationcorresponding to these symbols can be replaced by new information. Tothis effect, a recirculating buffer memory 1 is used, in which thesymbol data passes through a certain cycle. At a given moment duringthis cycle, the information of a symbol to be displayed is extractedfrom the buffer register at a fixed location in the buffer memory andfed to the symbol generator 2.

In accordance with the invention, the buffer memory 1 is provided with anumber of cyclic submemories 4a-z, connected in parallel, which numbercorresponds to the maximum number of lines of text to be displayed onthe screen. Each submemory corresponds to a fixed line of text on themonitor. In the version in question, each code word, in so far as thisrefers to the type of symbol to be displayed, is written in parallelform into a cyclic submemory. Such a cyclic submemory should thereforecontain a number of shift registers operating in parallel, which numbercorresponds to the number of binary digits, making up the written codeword. The

combination of a number of shift registers operating in parallel forms arecirculating memory. In the design in question, each of the cyclicsubmemories 40-: can therefore be regarded as one recirculating memory.

ln order that the symbol data, in so far as this refers to the type ofsymbol to be displayed, is written into the desired recirculating memoryat the correct moment, the buffer memory 1 is provided with an inputcircuit 5 preceding the recirculating memories 4a-z. Since therespective symbol data is fed via a single communication line from thecomputer to the buffer memory, and this information is to be written inparallel form into one of the recirculating memories, the buffer memorycomprises a serial-parallel converter 6 preceding the input circuit 5.

The symbol data, once written in the recirculating memories 40-2, isreadout symbol after symb o l in order of succession of therecirculating memories with the aid of a line selection switch 7controlled by the timing unit 3, and said data is fed to the symbolgenerator 2.

In the symbol generator 2, the symbol data is fed to a fixed matrixmemory 8. As will further be described hereinafter, also a signalindicating a specific scan line is fed to this matrix memory with theaid of a scan line switch 9. With these two kinds of data, the matrixmemory 8 is able to provide per scan line the information referring tothe symbols to be displayed, which information is again supplied inparallel form to a parallelserial converter 11 with the aid of thetiming unit 3. The series of signals obtained from the parallel-serialconverter are fed as video signals to the monitor.

FIG. 2 shows a more detailed block diagram of the buffer memory. Thefunction of the serial-parallel converter 6 contained in this memory is,besides to convert serial data to parallel data, to divide the suppliedsymbol data into: information referring to the type of symbol to bedisplayed (symbol-type information); information referring to the lineof text in which the symbol must be placed (row information) andinformation regarding the position within this line of text on which thesymbol should be displayed (column information). The symbol-typeinformation is written into the symbol register [2. The row informationis written into the row register 13 and then fed to the submemoryselector 14. The column information is fed to the column conditioncircuit 15; this comprises a column register 16, into which said columninformation is written. Furthermore, the column condition circuit 15comprises a symbol counter 17, in which the clock pulses T, derived fromthe timing unit 3 are counted; these clock pulses have a repetition timewhich is equal to the time required to display a scan line part of onesymbol on the television screen. The information of the digital positionof the symbol counter 17, and also the column information stored in thecolumn register 16, are applied separately to an equivalence circuit 18incorporated in the column condition circuit 15; if the two kinds ofinformation are identical, the equivalence circuit 18 sends a signal tothe submemory selector 14.

In the version in question, the submemory selector 14 consists of adecoder which is provided with a number of outputs A This numbercorresponds to the number of recirculating memories 4a-z; each of theoutputs A, is connected separately to one of the recirculating memories4a-z.

The submemory selector [4 is activated by a signal originating from theequivalence circuit 18 and, consequently, causes the transmission of acontrol signal to the recirculating memory corresponding to therespective row information via the appropriate line A, (i a, b, z). Theworking of these recirculating memories 4a-z will now be explained by afurther description of the recirculating memory 40, which is shown inFIG. 3. The recirculating memory 40 comprises, in addition to theaforementioned number of parallelconnected shift registers 19 24, anequal number of return lines 25 30 and gate circuits 31 36. The workingof the parts incorporated in the recirculating memory 4a will be furtherexplained with reference to the gate circuit 31, the shift register 19and the return line 25, which elements are necessary, for example, forthe processing of the first binary digit of a code word from the symbolregister 12. The gate circuit 31 is a logical circuit of which the threeinputs are indicated by A,,, f and g and the output by h. The controlsignal from the submemory selector 14 is applied to the input A Itshould be noted that this control signal is also fed to thecorresponding inputs of the gate circuits 32 36. The information, whichis obtained from the symbol register 12, and which refers to the firstbinary digit of each code word, is applied to input f, while theinformation from the shift register 19 is fed sequentially to input gvia the return line 25. The supplied information is fed to the shiftregister 19 via output h. The latter information may be indicated by therelationship h=A -f+/T,

Therefore, in the presence of the control signal A the information (f),which is derived from the symbol register (12,) and which refers to saidbinary digit, is written into the respective shift register 19 via thegate circuit 31. During this process the information, which is fed fromthe shift register 19 to the gate circuit 31 via the return line 25,will be eliminated. The control signal A is applied each time for theduration of the writing of one binary digit. In the absence of thecontrol signal A the information (g) derived from the shift register 19is fed back to the shift register 19 via the return line 25 and the gatecircuit 31, and is rewritten in this register.

The remaining binary digits of these code words are fed to the remaininggate circuits 32 36 in order to be written, after selection, into theshift registers connected to said gate circuits; the shift registers 1924 operate with a shift frequency which is equal to the pulse repetitionfrequency of the clock pulses T As shown in FIG. 2, the symbol-typeinformation, once written in the recirculating memories 40-2, isextracted from said memories by a line selection switch 7 and fed to thesymbol generator 2. The line selection switch 7 comprises a counter 37,a decocer 38, and also a number of gate circuits 390-1. The number ofcircuits 390-: corresponds to the number of recirculating memories 4a-z,so that each gate circuit 31-36 can be connected to the symbol generator2 via a separate gate circuit.

The counter 37 receives the clock pulses T. from the timing unit 3 witha repetition time which is equal to the time required for displaying onecomplete line of text on the television screen. The digital position ofthe counter 37 obtained through the clock pulses T is decoded by thedecoder 38. This causes the activation of the gate circuit 39i (i =a, b,z) determined by the count position via one of the outputs B Theinformation in the recirculating memory 4i connected to this gatecircuit can now be applied to the symbol generator 2. During the periodof time between two successive clock pulses T said information is fed tothe symbol generator 2 a number of times, which number corresponds tothe number of scan lines required for displaying one line of text. Forthe processing of the symboltype information, the afore-mentioned matrixmemory 8 is incorporated in the symbol generator 2.

The scan line switch 9 in the symbol generator 2 comprises a linecounter and a line decoder connected to said counter, which are,however, not shown separately in the figures.

Clock pulses T (see FIG. 2), of which the pulse repetition period isequal to the time required for displaying a scan line on the televisionscreen and for performing a retrace, are supplied by the timing unit 3to the line counter of the scan line switch 9. The count positionacquired by said line counter is decoded by the line decoder connectedto the line counter; this information enables the fixed matrix memory 8to form, per scan line the corresponding symbol information which, isthen fed to the parallel-serial converter 11.

Signals in serial form, viz., video signals, are obtained from theparallel-serial converter 11 with the aid of the clock pulses T,provided by the timing unit The pulse repetition frequency of theseclock pulses T, is identical to the frequency employed to obtain therapid fluctuations in the grid-cathode voltage of the picture tube forthe formation of the afore-mentioned luminous dots or dashes on thescreen.

The operation of the above-described device will now be explained withthe aid of an example.

It will be considered how the device operates, for ex ample, byconsidering information relating to the letter E to be displayed at thetenth position of the first line of text on the screen. The computerwill supply the serial-parallel converter 6, which is illustrated inFIG. 2, with the row information, the column information, and thesymbol-type information required for displaying the letter E in the formof the code words, for example: (l,0,l,0,0,0,l), (l,0,1,l,0,0,1), and(l,0,l,0,0,0), respectively. In this serial-parallel converter, thethree supplied code words are separated. The rwo information(l,0,l,0,0,0,l) is written into the row register 13, and then fed to thesubmemory selector 14. The column information l ,0,l ,l,0,0,l is writteninto the column register 16, and then fed to the equivalence circuit 18.Finally, the symbol-type information (l,0,l,0,0,0) is written into thesymbol register 12.

When the symbol counter 17 has acquired a binary count position, whichis identical to the column information 1,0,],1 ,0,0,l with the aid ofclock pulses T the equivalence circuit 18 sends a signal to thesubmemory selector 14. Subsequently, in the submemory selector l4,activated by said signal, the row information l ,O,l ,0,0,0) is decoded.This results in the example in question, in which the first line of textmust be displayed, in a control signal at the output A said controlsignal being applied to the recirculating memory 40. Although theinformation written in the symbol register 12 is applied to all f-inputsof the gate circuits in the recirculating memories 40-2, thisinformation is accepted only by the gate circuits 31 36 activated by thecontrol signal, and written into the corresponding shift registers19-24. ln this process, the first binary 1" of the symbol selectioninformation (l,0,l,0,0,0) is applied to the first shift register 19 viathe respective gate circuit 31, and the second binary 0" to the secondshift register 20 via the respective gate circuit 32. The remainingbinary digits are then processed similarly in the recirculating memory40.

When the digital position of the counter 37, which is illustrated inFIG. 2, indicates that the first line of text must be displayed on thescreen, the decoder 38 activates the gate circuit 390 via the line B theinformation written in the recirculating memory 4a is then fed to thesymbol generator 2 via the gate circuit 390.

In addition to supplying the information written in the recirculatingmemory 4a to the symbol generator 2, there is also a supply of identicalinformation to the gate circuits 31 36 of the recirculating memory 4avia the return lines 25 30.

The information fed to the symbol generator 2 is accepted by the fixedmatrix memory 8. During the processing of symbol data by the fixedmatrix memory 8, an allowance must be made for a spaced needed betweentwo successive lines of text; this space is obtained, on the one hand,by starting the symbol display, for which the information is processedby the fixed matrix memory 8, at the fourth scan line and, on the otherhand, by adding another five scan lines after the last scan line (l3thscan line) pertaining to such a display. Therefore, the letter E in thisline of text is given such a form that a horizontal line segment isdisplayed on the 4th, 8th and 13th scan lines, at which the startingpoints of these line segments are joined by a vertical line segment, asshown in FIG. 5A.

With the aid of the information which is provided by the scan lineswitch 9, and which refers to the scan line to be displayed, the fixedmatrix memory 8 is capable of delivering the information of the line oftext per scan line, and to feed this information to the parallel-serialconverter 11. With the delivery of information per scan line, the spacebetween two successive symbols must be taken into account. Accordingly,the information provided by the fixed matrix memory 8 with reference tothe letter E" for the fourth scan line, may assume, for example, theform (0,0,0,l,l,l,1,l,l,0,0); the number of binary digits comprised bythis information corresponds to the number of time intervals in whichthe period of time for displaying one symbol is divided. If the binary lis added to such a time interval, the electron beam will strike thescreen; if the binary digit is 0, the electron beam will be suppressedduring the respective time interval. If the information of the line oftext of the fourth scan line has been fed to the parallel-serialconverter l 1, identical information will again be sent to the fixedmatrix memory 8 on the presence of a line synchronization signal, afterthe latter information, returned via the lines 25 30, has been restoredin the recirculating memory 40.

Hence, the parallel-serial converter ll provides the followingnformation per scan line for displaying the letter "E:

(0,0,0,0,0,0,0,0,0,0,0) for scan lines 1 3 (0,0,0,l,l,l,l,l,l,0,0) forscan line 4 (0,0,0,l,0,0,0,0,0,0,0) for scan lines 5 7(0,0,0,l,l,l,l,l,0,0) for scan line 8 (0,0,0,l,0,0,0,0,0,0,0) for scanlines 9 l2 (0,0,0,l,l,l,l,l,1,l,0) for scan line 13(0,0,0,0,0,0,0,0,0,0,0) for scan lines 14 l8 Since the binary 1 resultsin a positive grid pulse, the above collection of information assignedper scan line corresponds with the video signals shown in the diagram ofFIG. 5B, which signals are required for displaying the letter E."

It must be emphasised that the complete data processing between theserial-parallel converter 6 and the parallel-serial converter 11, iscarried out in parallel form. However, it is also possible to processthe symbol information in a serial form in the buffer memory 1,whereupon this information is applied to the symbol generator 2 inparallel form. A version of the invention based on these lines will beexplained with reference to FIG. 4. if parts of the device in thisversion are not further dealth with, then an analogous explanation, asgiven in the first version, will apply,

The buffer memory 1 comprises a symbol separation circuit 48, an inputcircuit 5, a plurality of cyclic submemories 4a-z, a line selectionswitch 7, a serial parallel converter 47, a switchable memory 49composed of a recirculating memory, and a recirculating memory 50.

The symbol separation circuit 48 divides the supplied symbol informationinto three kinds of information, viz,. the symbol-type information, thecolumn information and the row information, where the column informationand the row information are converted into parallel form and soprocessed. These three kinds of information are then fed to the inputcircuit 5, in which the symbol-type information is written in serialform, while the row and column information are processed into a controlsignal that must be applied to the desired submemory 4i at the correctmoment, in order to write the symbol information stored in the inputcircuit 5.

The number of cyclic submemories is again equal to the number of linesof text to be displayed; however, now each of the cyclic submemories4a-z is formed by a register, into which the symbol information of onesingle line of text is written in serial form. The symbol informationwritten in each of the submemories 40-2. is then fed sequentially to aserial-parallel converter 47 via a line selection switch 7, andsubsequently to the switchable memory 49. Since the information isstored in serial form in the shift registers 4a-z, and in parallel formin the switchable memory 49, the shift frequency of the switchablememory 49 will be smaller than that of the shift registers 4a-z by sucha factor that corresponds with the number of binary digits of which acode word is composed. In order to operate the shift registers 4a-z andthe symbol generator 2 at the same frequency, the shift frequency of theswitchable memory 49 will, when this memory is provided with informationof a complete line of text, change in such a way that this frequencycorresponds to the operating frequency of the symbol generator 2. Theinformation of the switchable memory 49 is applied with the latterfrequency to a recirculating memory 50, which has a constant shiftfrequency that is equal to the operating frequency of the symbolgenerator 2. The number of times the information of the recirculatingmemory 50 is fed to the symbol generator 2, corresponds to the number ofscan lines required for displaying one line of text.

What we claim is:

l. A digital symbol diaplay device for the processing of symbol datapresented in digital form for the purpose of displaying text on atelevision screen comprising a buffer memory, a symbol generatorconnected to said buffer memory, and a timing unit connected to saidbuffer memory and said symbol generator, said device, in a firstinstance, presenting successive lines of text in a read direction to thetelevision screen, and, in a second instance, replacing symbols randomlyallocated and already displayed by other symbols, said buffer memorybeing capable of storing the maximum number of symbols to be displayedon the television screen, said buffer memory being provided with aplurality of cyclic submemories in each of which data required fordisplay and referring to one line of text can be stored in parallelform, while the number of times at which said data is fed to said symbolgenerator corresponds to the number of scan lines required for thedisplay of one line of text, the data required for display, andpertaining to a desired scan line, each time being fed to saidtelevision screen by the symbol generator, the buffer memory beingprovided with an input circuit with each of said cyclic submemoriesconnected to said input circuit, the information required for displayingone specific line of text being written into a respective cyclicsubmemory with the aid of the input circuit.

2. A device as claimed in claim 1, wherein the buffer memory comprises aserial-parallel converter, which precedes and is connected to the inputcircuit and via which the supplied serial information is fed in parallelform to said input circuit, said serial information being divided intosymbol-type information, row information and column information wherebythe row information indicates the cyclic submemory in which thesymboltype information must be stored, while the column information isfor the purpose of determining the time at which the symbol-typeinformation must be stored at a fixed write-in location of said cyclicsubmemory.

3. A device as claimed in claim 2, wherein the input circuit comprises asymbol register, a row register and a column condition circuit connectedto the timing unit, to which, respectively, the symbol-type information,the row information and the column information are fed, and whereby alsoa submemory selector is present, which submemory selector is connectedto the column condition circuit and the row register, and which deliversa control signal at a time to be determined by the column conditioncircuit, said control signal implementing the writing of saidsymbol-type information into a respective cyclic submemory 4. A deviceas claimed in claim 3, wherein the column condition circuit comprises acolumn register and a symbol counter, to which, respectively, the columninformation and clock pulses derived from the timing unit are fed, thecolumn condition circuit also containing an equivalence circuit which isconnected to said column register and said symbol counter, and whichdetermines the moment at which the submemory selector delivers saidcontrol signal.

5. A device as claimed in claim 4, wherein a gate circuit is disposed ina return line of each cyclic submemory, the return line beinginterrupted when the control signal is applied to said gate circuit,during which the symbol information derived from the input circuit canbe written into said memory.

6. A device as claimed in claim I, wherein the buffer memory is providedwith a line selection circuit, via which the information of one specificline of text to be displayed is fed from a respective cyclic submemoryto the symbol generator with the aid of the timing unit.

7. A device as claimed in claim 6, wherein the line selection circuit iscomposed of a counter, to which required count pulses are applied by thetiming unit, a decoder connected to said counter, and a number of gatecircuits connected to said decoder, each of which is connected to one ofthe cyclic submemories, whereby a signal corresponding to the decodedcounter position opens the gate circuit connected to an associatedcyclic submemory, enabling information to be transferred from theassociated cyclic submemory to the symbol generator.

8. A device as claimed in claim I, wherein the information required fordisplaying a line of text is stored in serial form in the respectivecyclic submemory and wherein the buffer memory is provided with a lineselection circuit, connected to said submemories whereby the informationof the specific line of text to be displayed is fed, with the aid of thetiming unit, from the respective cyclic submemory, via said lineselection circuit to a serial-parallel converter.

9. A device as claimed in claim 8, wherein, said device contains meansfor employing the same shift frequency at the cyclic submemories and atthe serialparallel converter and said device being also provided with aswitchable memory feeding a recirculating memory for whose functioningtwo different frequencies are available one frequency for storing thesymbol information, which is written in serial form in the cyclicsubmemory, in the switchable memory capable to receive data in parallelform, and the other frequency for transmitting data from the switchablememory to the recirculating memory, the latter frequency being equal tothat of the symbol generator.

l i i UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION patent No3,787,819 Dated anuary 22, 1974 Invenmfls) HENDRIK BUSIN'K It iscertified that error appears in the above-identified patent and thatsaid Letters Patent are hereby corrected as shown below:

Column 8, line 48, "0" should be -"O"- Column 8, line 64, (0,0,0, 1, l,l, 1, 1,0,0.) should be --(o,o,o,1,1,1,1,1,o,o,0,)--

Signed and sealed this 21st day of May 1974.

(SEAL) Attest:

EDWARD M.FLETCHER,JR. C. MARSHALL DANN Attesting Officer Commissioner ofPatents

1. A digital symbol diaplay device for the processing of symbol datapresented in digital form for the purpose of displaying text on atelevision screen comprising a buffer memory, a symbol generatorconnected to said buffer memory, and a timing unit connected to saidbuffer memory and said symbol generator, said device, in a firstinstance, presenting successive lines of text in a read direction to thetelevision screen, and, in a second instance, replacing symbols randomlyallocated and already displayed by other symbols, said buffer memorybeing capable of storing the maximum number of symbols to be displayedon the television screen, said buffer memory being provided with aplurality of cyclic submemories in each of which data required fordisplay and referring to one line of text can be stored in parallelform, while the number of times at which said data is fed to said symbolgenerator corresponds to the number of scan lines required for thedisplay of one line of text, the data required for display, andpertaining to a desired scan line, each time being fed to saidtelevision screen by the symbol generator, the buffer memory beingprovided with an input circuit with each of said cyclic submemoriesconnected to said input circuit, the information required for displayingone specific line of text being written into a respective cyclicsubmemory with the aid of the input circuit.
 2. A device as claimed inclaim 1, wherein the buffer memory comprises a serial-parallelconverter, which precedes and is connected to the input circuit and viawhich the supplied serial information is fed in parallel form to saidinput circuit, said serial information being divided into symbol-typeinformation, row information and column information whereby the rowinformation indicates the cyclic submemory in which the symbol-typeinformation must be stored, while the column information is for thepurpose of determining the time at which the symbol-type informationmust be stored at a fixed write-in location of said cyclic submemory. 3.A device as claimed in claim 2, wherein the input circuit comprises asymbol register, a row register and a column condition circuit connectedto the timing unit, to which, respectively, the symbol-type information,the row information and the column information are fed, and whereby alsoa submemory selector is present, which submemory selector is connectedto the column condition circuit and the row register, and which deliversa control signal at a time to be determined by the column conditioncircuit, said control signal implementing the writing of saidsymbol-type information into a respective cyclic submemory
 4. A deviceas claimed in claim 3, wherein the column condition circuit comprises acolumn register and a symbol counter, to which, respectively, the columninformation and clock pulses derived from the timing unit are fed, thecolumn condition circuit also containing an equivalence circuit which isconnected to said column register and said symbol counter, and whichdetermines the moment at which the submemory selector delivers saidcontrol signal.
 5. A device as claimed in claim 4, wherein a gatecircuit is disposed in a return line of each cyclic submemory, thereturn line being interrupted when the control signal is applied to saidgate circuit, during which the symbol information derived from the inputcircuit can be written into said memory.
 6. A device as claimed in claim1, wherein the buffer memory is provided with a line selection circuit,via which the information of one specific line of text to be displayedis fed from a respective cyclic submemory to the symbol generator withthe aid of the timing unit.
 7. A device as claimed in claim 6, whereinthe line selection circuit is composed of a counter, to which requiredcount pulses are applied by the timing unit, a decoder connected to saidcounter, and a number of gate circuits connected to said decoder, eachof which is connected to one of the cyclic submemories, whereby a signalcorresponding to the decoded counter position opens the gate circuitconnected to an associated cyclic submemory, enabling information to betransferred from the associated cyclic submemory to the symbolgenerator.
 8. A device as claimed in claim 1, wherein the informationrequired for displaying a line of text is stored in serial form in therespective cyclic submemory and wherein the buffer memory is providedwith a line selection circuit, connected to said submemories whereby theinformation of the specific line of text to be displayed is fed, withthe aid of the timing unit, from the respective cyclic submemory, viasaid line selection circuit to a serial-parallel converter.
 9. A deviceas claimed in claim 8, wherein, said device contains means for employingthe same shift frequency at the cyclic submemories and at theserial-parallel converter and said device being also provided with aswitchable memory feeding a recirculating memory for whose functioningtwo different frequencies are available one frequency for storing thesymbol information, which is written in serial form in the cyclicsubmemory, in the switchable memory capable to receive data in parallelform, and the other frequency for transmitting data from the switchablememory to the recirculating memory, the latter frequency being equal tothat of the symbol generator.